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vhdl_byte_input
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Joachim Lusiardi a6bc95b557 add vhdl code 2018-04-10 21:40:24 +02:00
hardware add hw design 2018-04-09 21:28:19 +02:00
LICENSE Initial commit 2018-04-09 17:02:33 +00:00
README.md Initial commit 2018-04-09 17:02:33 +00:00
byte_display.vhd add vhdl code 2018-04-10 21:40:24 +02:00
byte_input.vhd add vhdl code 2018-04-10 21:40:24 +02:00
clock_divider_module.vhd add vhdl code 2018-04-10 21:40:24 +02:00
debounce.vhd add vhdl code 2018-04-10 21:40:24 +02:00
demo.vhd add vhdl code 2018-04-10 21:40:24 +02:00

README.md

vhdl_byte_input